mirror of https://github.com/oliverbooth/X10D
Software fallback implementation for methods in IntrinsicExtensions
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RealityProgrammer
parent
0c9623bab3
commit
1651f0ed19
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@ -17,8 +17,6 @@ public static class IntrinsicUtility
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// ANYTHING OPERATION OPERATION ON ANYTHING THAT ISN'T FLOAT IS NOT SSE COMPATIBLE, MUST BE SSE2 AND BEYOND VERSION
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// FOR API CONSISTENCY.
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// TODO: Fallback? No idea if it is worth it since even CPU made from before 2000 support SSE and SSE2.
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/// <summary>
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/// <br>Correcting <see cref="Vector64{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.</br>
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/// <br>Operation (raw):</br>
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@ -36,8 +34,6 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector64{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <remarks>API avaliable on ARM NEON (untested) hardware.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't suppot ARM NEON intrinsic set.</exception>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector64<byte> CorrectBoolean(Vector64<byte> vector)
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@ -51,13 +47,20 @@ public static class IntrinsicUtility
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return result;
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}
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// No comparison, bitwise AND with 64-bit vector on SSE and beyond.
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if (Sse2.IsSupported)
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var output = GetUninitializedVector64<byte>();
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for (int i = 0; i < Vector64<byte>.Count; i++)
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{
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throw new PlatformNotSupportedException("Operation is not supported on SSE2 instruction set.");
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ref var writeElement = ref Unsafe.Add(ref Unsafe.As<Vector64<byte>, byte>(ref output), i);
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#if NET7_0_OR_GREATER
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writeElement = vector[i] == 0 ? (byte)0 : (byte)1;
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#else
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var element = Unsafe.Add(ref Unsafe.As<Vector64<byte>, byte>(ref vector), i);
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writeElement = element == 0 ? (byte)0 : (byte)1;
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#endif
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}
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throw new PlatformNotSupportedException("Unknown intrinsic instruction set.");
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return output;
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}
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/// <summary>
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@ -76,9 +79,7 @@ public static class IntrinsicUtility
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/// </code>
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector64{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <remarks>API avaliable on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support ARM NEON or SSE2 instruction set.</exception>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<byte> CorrectBoolean(Vector128<byte> vector)
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@ -99,7 +100,20 @@ public static class IntrinsicUtility
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return result;
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}
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throw new PlatformNotSupportedException("Unknown intrinsic instruction set.");
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var output = GetUninitializedVector128<byte>();
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for (int i = 0; i < Vector128<byte>.Count; i++)
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{
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ref var writeElement = ref Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref output), i);
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#if NET7_0_OR_GREATER
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writeElement = vector[i] == 0 ? (byte)0 : (byte)1;
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#else
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var element = Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref vector), i);
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writeElement = element == 0 ? (byte)0 : (byte)1;
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#endif
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}
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return output;
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}
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/// <summary>
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@ -118,9 +132,7 @@ public static class IntrinsicUtility
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/// </code>
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector64{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <remarks>API avaliable on AVX2 hardware.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support AVX2 instruction set.</exception>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector256<byte> CorrectBoolean(Vector256<byte> vector)
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@ -133,12 +145,20 @@ public static class IntrinsicUtility
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return result;
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}
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if (AdvSimd.IsSupported)
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var output = GetUninitializedVector256<byte>();
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for (int i = 0; i < Vector256<byte>.Count; i++)
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{
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throw new PlatformNotSupportedException("Operation is not supported on ARM NEON instruction set.");
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ref var writeElement = ref Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref output), i);
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#if NET7_0_OR_GREATER
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writeElement = vector[i] == 0 ? (byte)0 : (byte)1;
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#else
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var element = Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref vector), i);
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writeElement = element == 0 ? (byte)0 : (byte)1;
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#endif
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}
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throw new PlatformNotSupportedException("Unknown intrinsic instruction set.");
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return output;
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}
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/// <summary>
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@ -152,8 +172,6 @@ public static class IntrinsicUtility
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <remarks>API avaliable on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support SSE2 or ARM NEON instruction set.</exception>
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[Pure]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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@ -186,7 +204,15 @@ public static class IntrinsicUtility
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return AdvSimd.MultiplyWideningLowerAndAdd(AdvSimd.ShiftLeftLogical(mul.AsUInt64(), 32), a, b);
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}
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throw new PlatformNotSupportedException("Unsupported SIMD platform.");
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var output = GetUninitializedVector128<ulong>();
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Unsafe.As<Vector128<ulong>, ulong>(ref output) =
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Unsafe.As<Vector128<ulong>, ulong>(ref lhs) * Unsafe.As<Vector128<ulong>, ulong>(ref rhs);
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref output), 1) =
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref lhs), 1) * Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref rhs), 1);
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return output;
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}
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/// <summary>
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@ -202,8 +228,6 @@ public static class IntrinsicUtility
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <remarks>API avaliable on AVX2 hardware.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support AVX2 instruction set.</exception>
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[Pure]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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@ -224,7 +248,15 @@ public static class IntrinsicUtility
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return Avx2.Add(high, ac);
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}
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throw new PlatformNotSupportedException("Unsupported SIMD platform.");
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var output = GetUninitializedVector256<ulong>();
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for (int i = 0; i < Vector256<ulong>.Count; i++)
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{
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref output), i) =
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref lhs), i) * Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref rhs), i);
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}
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return output;
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}
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/// <summary>
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@ -238,8 +270,6 @@ public static class IntrinsicUtility
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="long"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <remarks>API avaliable on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support SSE2 or ARM NEON instruction set.</exception>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<long> Multiply(Vector128<long> lhs, Vector128<long> rhs)
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@ -260,8 +290,6 @@ public static class IntrinsicUtility
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <remarks>API avaliable on AVX2 hardware.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support AVX2 instruction set.</exception>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector256<long> Multiply(Vector256<long> lhs, Vector256<long> rhs)
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@ -282,8 +310,6 @@ public static class IntrinsicUtility
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="float"/> with all elements is result of OR operation on adjacent pairs of elements in lhs and rhs.</returns>
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/// <remarks>API avaliable on SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM64 NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support ARM64 NEON or SSE instruction set.</exception>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<float> HorizontalOr(Vector128<float> lhs, Vector128<float> rhs)
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@ -304,7 +330,21 @@ public static class IntrinsicUtility
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return AdvSimd.Or(s1, s2);
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}
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throw new PlatformNotSupportedException("Unsupported SIMD platform.");
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Vector128<float> output = GetUninitializedVector128<float>();
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Unsafe.As<Vector128<float>, uint>(ref output) =
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Unsafe.As<Vector128<float>, uint>(ref lhs) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 1) =
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 2) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 3);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 2) =
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Unsafe.As<Vector128<float>, uint>(ref rhs) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 3) =
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 2) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 3);
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return output;
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}
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/// <summary>
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@ -374,10 +414,47 @@ public static class IntrinsicUtility
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{
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return Sse2.Shuffle(vector.AsDouble(), vector.AsDouble(), 0b01).AsUInt64();
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}
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// No idea how to implement this in ARM NEON (Reason: Unavailable hardware)
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throw new PlatformNotSupportedException("Unsupported SIMD platform.");
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Vector128<ulong> output = GetUninitializedVector128<ulong>();
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Unsafe.As<Vector128<ulong>, ulong>(ref output) = Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref vector), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref output), 1) = Unsafe.As<Vector128<ulong>, ulong>(ref vector);
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return output;
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}
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// Helper methods
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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private static Vector64<T> GetUninitializedVector64<T>() where T : struct
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{
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#if NET6_0_OR_GREATER
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Unsafe.SkipInit(out Vector64<T> output);
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return output;
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#else
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return default;
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#endif
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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private static Vector128<T> GetUninitializedVector128<T>() where T : struct
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{
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#if NET6_0_OR_GREATER
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Unsafe.SkipInit(out Vector128<T> output);
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return output;
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#else
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return default;
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#endif
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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private static Vector256<T> GetUninitializedVector256<T>() where T : struct
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{
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#if NET6_0_OR_GREATER
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Unsafe.SkipInit(out Vector256<T> output);
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return output;
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#else
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return default;
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#endif
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}
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}
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@ -1,7 +1,6 @@
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using System.Diagnostics.Contracts;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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using System.Numerics;
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#if NETCOREAPP3_0_OR_GREATER
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using X10D.Core;
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@ -112,13 +111,13 @@ public static class SpanExtensions
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default:
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#if NET7_0_OR_GREATER
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throw new UnreachableException($"Enum with the size of {Unsafe.SizeOf<T>()} bytes is unexpected.");
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#else // NET7_0_OR_GREATER
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#else
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throw new ArgumentException($"Enum with the size of {Unsafe.SizeOf<T>()} bytes is unexpected.");
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#endif // NET7_0_OR_GREATER
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#endif
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}
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#pragma warning restore CS8500 // This takes the address of, gets the size of, or declares a pointer to a managed type
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}
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#else // NET6_0_OR_GREATER
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#else
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foreach (var it in span)
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{
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if (EqualityComparer<T>.Default.Equals(it, value))
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@ -128,7 +127,7 @@ public static class SpanExtensions
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}
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return false;
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#endif // NET6_0_OR_GREATER
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#endif
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}
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/// <summary>
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