mirror of
https://github.com/oliverbooth/X10D
synced 2024-11-10 02:45:41 +00:00
Fix source validator's code reports, remove 95% of AdvSimd implementation to prevent future consequences
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@ -5,7 +5,8 @@ using System.Runtime.Intrinsics;
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namespace X10D.Core;
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/// <summary>
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/// Extension methods for SIMD vectors, namely <see cref="Vector64{T}"/>, <see cref="Vector128{T}"/> and <see cref="Vector256{T}"/>.
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/// Extension methods for SIMD vectors, namely <see cref="Vector64{T}"/>, <see cref="Vector128{T}"/> and
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/// <see cref="Vector256{T}"/>.
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/// </summary>
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public static class IntrinsicExtensions
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{
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@ -18,7 +18,9 @@ public static class IntrinsicUtility
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// FOR API CONSISTENCY.
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/// <summary>
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/// <br>Correcting <see cref="Vector64{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.</br>
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/// <br>
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/// Correcting <see cref="Vector64{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.
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/// </br>
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/// <br>Operation (raw):</br>
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/// <code>
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/// for (int i = 0; i < 8; i++) {
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@ -33,19 +35,15 @@ public static class IntrinsicUtility
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/// </code>
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector64{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <returns>
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/// A <see cref="Vector64{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector64<byte> CorrectBoolean(Vector64<byte> vector)
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{
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if (AdvSimd.IsSupported)
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{
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// Haven't tested since March 6th 2023 (Reason: Unavailable hardware).
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var cmp = AdvSimd.CompareEqual(vector, Vector64<byte>.Zero);
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var result = AdvSimd.BitwiseSelect(cmp, vector, Vector64<byte>.Zero);
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return result;
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}
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// TODO: AdvSimd implementation.
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// TODO: WasmSimd implementation. (?)
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var output = GetUninitializedVector64<byte>();
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@ -64,7 +62,9 @@ public static class IntrinsicUtility
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}
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/// <summary>
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/// <br>Correcting <see cref="Vector128{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.</br>
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/// <br>
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/// Correcting <see cref="Vector128{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.
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/// </br>
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/// <br>Operation (raw):</br>
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/// <code>
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/// for (int i = 0; i < 16; i++) {
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@ -79,7 +79,9 @@ public static class IntrinsicUtility
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/// </code>
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <returns>
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/// A <see cref="Vector128{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<byte> CorrectBoolean(Vector128<byte> vector)
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@ -91,33 +93,25 @@ public static class IntrinsicUtility
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return result;
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}
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if (AdvSimd.IsSupported)
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{
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// Haven't tested since March 6th 2023 (Reason: Unavailable hardware).
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var cmp = AdvSimd.CompareEqual(vector, Vector128<byte>.Zero);
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var result = AdvSimd.BitwiseSelect(cmp, vector, Vector128<byte>.Zero);
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return result;
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}
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// TODO: AdvSimd implementation.
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// TODO: WasmSimd implementation.
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var output = GetUninitializedVector128<byte>();
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for (int i = 0; i < Vector128<byte>.Count; i++)
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{
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ref var writeElement = ref Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref output), i);
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#if NET7_0_OR_GREATER
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writeElement = vector[i] == 0 ? (byte)0 : (byte)1;
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#else
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var element = Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref vector), i);
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writeElement = element == 0 ? (byte)0 : (byte)1;
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#endif
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Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref output), i) =
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Unsafe.Add(ref Unsafe.As<Vector128<byte>, byte>(ref vector), i) == 0 ? (byte)0 : (byte)1;
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}
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return output;
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}
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/// <summary>
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/// <br>Correcting <see cref="Vector256{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.</br>
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/// <br>
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/// Correcting <see cref="Vector256{T}"/> of <see langword="byte"/> into 0 and 1 depend on their boolean truthiness.
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/// </br>
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/// <br>Operation (raw):</br>
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/// <code>
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/// for (int i = 0; i < 16; i++) {
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@ -132,7 +126,9 @@ public static class IntrinsicUtility
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/// </code>
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/// </summary>
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/// <param name="vector">Vector of byte to correct.</param>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.</returns>
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/// <returns>
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/// A <see cref="Vector256{T}"/> of <see langword="byte"/> which remapped back to 0 and 1 based on boolean truthiness.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector256<byte> CorrectBoolean(Vector256<byte> vector)
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@ -149,20 +145,17 @@ public static class IntrinsicUtility
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for (int i = 0; i < Vector256<byte>.Count; i++)
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{
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ref var writeElement = ref Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref output), i);
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#if NET7_0_OR_GREATER
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writeElement = vector[i] == 0 ? (byte)0 : (byte)1;
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#else
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var element = Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref vector), i);
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writeElement = element == 0 ? (byte)0 : (byte)1;
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#endif
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Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref output), i) =
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Unsafe.Add(ref Unsafe.As<Vector256<byte>, byte>(ref vector), i) == 0 ? (byte)0 : (byte)1;
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}
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return output;
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}
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/// <summary>
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/// <br>Multiply packed 64-bit unsigned integer elements in a and b and truncate the results to 64-bit integer.</br>
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/// <br>
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/// Multiply packed 64-bit unsigned integer elements in a and b and truncate the results to 64-bit integer.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] * rhs[0];
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@ -171,7 +164,9 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <returns>
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/// A <see cref="Vector128{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.
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/// </returns>
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[Pure]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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@ -191,18 +186,9 @@ public static class IntrinsicUtility
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return Sse2.Add(high, ac);
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}
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if (AdvSimd.IsSupported)
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{
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// https://stackoverflow.com/questions/60236627/facing-problem-in-implementing-multiplication-of-64-bit-variables-using-arm-neon
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// Hasn't been tested since March 7th 2023 (Reason: Unavailable hardware)
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var a = AdvSimd.ExtractNarrowingLower(lhs);
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var b = AdvSimd.ExtractNarrowingLower(rhs);
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var mul = AdvSimd.Multiply(rhs.AsUInt32(), AdvSimd.ReverseElement32(lhs).AsUInt32());
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return AdvSimd.MultiplyWideningLowerAndAdd(AdvSimd.ShiftLeftLogical(mul.AsUInt64(), 32), a, b);
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}
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// TODO: AdvSimd implementation.
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// TODO: WasmSimd implementation.
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var output = GetUninitializedVector128<ulong>();
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@ -210,13 +196,16 @@ public static class IntrinsicUtility
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Unsafe.As<Vector128<ulong>, ulong>(ref lhs) * Unsafe.As<Vector128<ulong>, ulong>(ref rhs);
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref output), 1) =
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref lhs), 1) * Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref rhs), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref lhs), 1) *
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Unsafe.Add(ref Unsafe.As<Vector128<ulong>, ulong>(ref rhs), 1);
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return output;
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}
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/// <summary>
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/// <br>Multiply packed 64-bit unsigned integer elements in a and b and truncate the results to 64-bit integer.</br>
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/// <br>
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/// Multiply packed 64-bit unsigned integer elements in a and b and truncate the results to 64-bit integer.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] * rhs[0];
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@ -227,7 +216,9 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <returns>
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/// A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.
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/// </returns>
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[Pure]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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@ -253,14 +244,17 @@ public static class IntrinsicUtility
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for (int i = 0; i < Vector256<ulong>.Count; i++)
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{
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref output), i) =
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref lhs), i) * Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref rhs), i);
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref lhs), i) *
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Unsafe.Add(ref Unsafe.As<Vector256<ulong>, ulong>(ref rhs), i);
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}
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return output;
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}
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/// <summary>
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/// <br>Multiply packed 64-bit signed integer elements in a and b and truncate the results to 64-bit integer.</br>
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/// <br>
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/// Multiply packed 64-bit signed integer elements in a and b and truncate the results to 64-bit integer.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] * rhs[0];
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@ -269,7 +263,9 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="long"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <returns>
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/// A <see cref="Vector128{T}"/> of <see langword="long"/> whose elements is 64-bit truncated product of lhs and rhs.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<long> Multiply(Vector128<long> lhs, Vector128<long> rhs)
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@ -278,7 +274,9 @@ public static class IntrinsicUtility
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}
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/// <summary>
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/// <br>Multiply packed 64-bit signed integer elements in a and b and truncate the results to 64-bit integer.</br>
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/// <br>
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/// Multiply packed 64-bit signed integer elements in a and b and truncate the results to 64-bit integer.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] * rhs[0];
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@ -289,7 +287,9 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.</returns>
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/// <returns>
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/// A <see cref="Vector256{T}"/> of <see langword="ulong"/> whose elements is 64-bit truncated product of lhs and rhs.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector256<long> Multiply(Vector256<long> lhs, Vector256<long> rhs)
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@ -298,7 +298,10 @@ public static class IntrinsicUtility
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}
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/// <summary>
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/// <br>Horizontally apply OR operation on adjacent pairs of single-precision (32-bit) floating-point elements in lhs and rhs.</br>
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/// <br>
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/// Horizontally apply OR operation on adjacent pairs of single-precision (32-bit) floating-point elements in lhs and
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/// rhs.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] | lhs[1];
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@ -309,7 +312,10 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="float"/> with all elements is result of OR operation on adjacent pairs of elements in lhs and rhs.</returns>
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/// <returns>
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/// A <see cref="Vector128{T}"/> of <see langword="float"/> with all elements is result of OR operation on adjacent pairs of
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/// elements in lhs and rhs.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<float> HorizontalOr(Vector128<float> lhs, Vector128<float> rhs)
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@ -321,34 +327,35 @@ public static class IntrinsicUtility
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return Sse.Or(s1, s2);
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}
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if (AdvSimd.Arm64.IsSupported)
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{
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// Hasn't been tested since March 7th 2023 (Reason: Unavailable hardware).
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var s1 = AdvSimd.Arm64.UnzipEven(lhs, rhs);
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var s2 = AdvSimd.Arm64.UnzipOdd(lhs, rhs);
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return AdvSimd.Or(s1, s2);
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}
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// TODO: AdvSimd implementation.
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// TODO: WasmSimd implementation. (?)
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Vector128<float> output = GetUninitializedVector128<float>();
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Unsafe.As<Vector128<float>, uint>(ref output) =
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Unsafe.As<Vector128<float>, uint>(ref lhs) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 1);
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Unsafe.As<Vector128<float>, uint>(ref lhs) |
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 1) =
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 2) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 3);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 2) |
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref lhs), 3);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 2) =
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Unsafe.As<Vector128<float>, uint>(ref rhs) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 1);
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Unsafe.As<Vector128<float>, uint>(ref rhs) |
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 1);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref output), 3) =
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 2) | Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 3);
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 2) |
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Unsafe.Add(ref Unsafe.As<Vector128<float>, uint>(ref rhs), 3);
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return output;
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}
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/// <summary>
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/// <br>Horizontally apply OR operation on adjacent pairs of 32-bit integer elements in lhs and rhs.</br>
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/// <br>
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/// Horizontally apply OR operation on adjacent pairs of 32-bit integer elements in lhs and rhs.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] | lhs[1];
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@ -359,9 +366,10 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="int"/> with all elements is result of OR operation on adjacent pairs of elements in lhs and rhs.</returns>
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/// <remarks>API avaliable on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM64 NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support ARM64 NEON or SSE instruction set.</exception>
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/// <returns>
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/// A <see cref="Vector128{T}"/> of <see langword="int"/> with all elements is result of OR operation on adjacent pairs of
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/// elements in lhs and rhs.
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/// </returns>
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[Pure]
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[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
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public static Vector128<int> HorizontalOr(Vector128<int> lhs, Vector128<int> rhs)
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@ -370,7 +378,9 @@ public static class IntrinsicUtility
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}
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/// <summary>
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/// <br>Horizontally apply OR operation on adjacent pairs of 32-bit unsigned integer elements in lhs and rhs.</br>
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/// <br>
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/// Horizontally apply OR operation on adjacent pairs of 32-bit unsigned integer elements in lhs and rhs.
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/// </br>
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/// <br>Operation:</br>
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/// <code>
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/// dest[0] = lhs[0] | lhs[1];
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@ -381,9 +391,10 @@ public static class IntrinsicUtility
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/// </summary>
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/// <param name="lhs">Left vector.</param>
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/// <param name="rhs">Right vector.</param>
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/// <returns>A <see cref="Vector128{T}"/> of <see langword="uint"/> with all elements is result of OR operation on adjacent pairs of elements in lhs and rhs.</returns>
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/// <remarks>API avaliable on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, ARM64 NEON (untested) hardwares.</remarks>
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/// <exception cref="PlatformNotSupportedException">Hardware doesn't support ARM64 NEON or SSE2 instruction set.</exception>
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/// <returns>
|
||||
/// A <see cref="Vector128{T}"/> of <see langword="uint"/> with all elements is result of OR operation on adjacent pairs of
|
||||
/// elements in lhs and rhs.
|
||||
/// </returns>
|
||||
[Pure]
|
||||
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
|
||||
[CLSCompliant(false)]
|
||||
@ -402,9 +413,10 @@ public static class IntrinsicUtility
|
||||
/// </code>
|
||||
/// </summary>
|
||||
/// <param name="vector">Input vector.</param>
|
||||
/// <returns>A <see cref="Vector128{T}"/> of <see langword="ulong"/> with elements the same as input vector except their positions/indices are reversed.</returns>
|
||||
/// <remarks>API available on SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 hardwares.</remarks>
|
||||
/// <exception cref="PlatformNotSupportedException">Hardware doesn't support SSE2 instruction set.</exception>
|
||||
/// <returns>
|
||||
/// A <see cref="Vector128{T}"/> of <see langword="ulong"/> with elements the same as input vector except their positions
|
||||
/// (or indices) are reversed.
|
||||
/// </returns>
|
||||
[Pure]
|
||||
[CLSCompliant(false)]
|
||||
[MethodImpl(MethodImplOptions.AggressiveInlining | MethodImplOptions.AggressiveOptimization)]
|
||||
|
@ -72,13 +72,14 @@ public static class SpanExtensions
|
||||
public static bool Contains<T>(this ReadOnlySpan<T> span, T value) where T : struct, Enum
|
||||
{
|
||||
#if NET6_0_OR_GREATER
|
||||
// Use MemoryMarshal.CreateSpan instead of using creating new Span instance from pointer will trim down a lot of instructions
|
||||
// on Release mode.
|
||||
// https://sharplab.io/#v2:EYLgxg9gTgpgtADwGwBYA0AXEBDAzgWwB8ABABgAJiBGAOgCUBXAOwwEt8YaBJFmKCAA4BlPgDdWYGLgDcAWABQZSrUYt2nAMIR8A1gBs+IqOMkyFxAExVzFIQAtsUAQBlsweszYc588wGZyGCYGfHIAFSkMAFFg0JByVhZyAG8FcnTyAEE0cgAhHI0cgBE0BQBfBX9KC3INFLSMgG0AKVYMAHEgvgkACgwATwEYCAAzHojcaNiASmmAXQb0xoBZGAw7CAATLh09HtX1rZ2BPQB5ATYIJlwaTIBzO9hcXFZRGB49RMS78kJyA4221250u11uDyeLzeIPYrAAXthQfNFpQAtQkORmLhsCMYORgBAIHp/mtAVQADxhAB8PSEAmwTEpVPIuHpTByYXIomwegYMGm5AA7nY+HjOfEYiF6vIMrLyLARgkkkEQrhyABeeUwRUAVWuOM4mVwlJyiQwNIVJPw0H6y0cuAcehonQwdG1oqYkh6rIZsx8coyxAA7FabXaoA6eTQNLBETA6QyepaVfhcDkfUwaM4gnd1tNo1cMNhErgenrsbjbsawqaWBbtVyeXy/SiKjKMiiWm1OkxumA+oNhmMJlMQrMFu2lgCjrt9qSZycYVcbvdHlIoe8mJ8mN9fiTDkDFxdWMvwWvnq8YDD8PDESemMjJ6jlBisQb8YTidPNhYmbS2UyLJshyja8vyQoirA4TkBKsTSgG6TBuQvaCuQCaMmaNLlgaVYAAoQGafBJg2qzWlAtr2o6zprG6uKwJ6MDemyszpmyWY5nmBYsMW1xlvqlZGiaSrmsRircmBLZPm2ZRAA===
|
||||
// Use MemoryMarshal.CreateSpan instead of using creating new Span instance from pointer will trim down a lot of
|
||||
// instructions on Release mode.
|
||||
|
||||
// Also use reference instead of MemoryMarshal.Cast to remove boundary check (or something, it just result in something like that).
|
||||
// Also use reference instead of MemoryMarshal.Cast to remove boundary check (or something, it just result in something
|
||||
// like that).
|
||||
|
||||
// TODO: Figure out some kind of way to directly pass the Span directly into Contains call, which make method smaller and more prone to inlining...
|
||||
// TODO: Figure out some kind of way to directly pass the Span directly into Contains call, which make method smaller and
|
||||
// more prone to inlining...
|
||||
unsafe
|
||||
{
|
||||
#pragma warning disable CS8500 // This takes the address of, gets the size of, or declares a pointer to a managed type
|
||||
@ -176,6 +177,10 @@ public static class SpanExtensions
|
||||
|
||||
return unchecked((byte)(IntegerPackingMagic * correct.AsUInt64().GetElement(0) >> 56));
|
||||
}
|
||||
|
||||
// Probably should remove this piece of code because it is untested, but I see no reason why it should fail
|
||||
// unless vld1_u8 reverse positions of 8 bytes for some reason.
|
||||
|
||||
if (AdvSimd.IsSupported)
|
||||
{
|
||||
// Hasn't been tested since March 6th 2023 (Reason: Unavailable hardware).
|
||||
@ -240,12 +245,12 @@ public static class SpanExtensions
|
||||
goto default;
|
||||
}
|
||||
|
||||
fixed (bool* pSource = source)
|
||||
{
|
||||
// TODO: .NET 8.0 Wasm support.
|
||||
// TODO: Implement a replacement for UInt64 vector multiplication (there are no instruction for this built-in).
|
||||
// TODO: AdvSimd implementation.
|
||||
// TODO: WasmSimd implementation.
|
||||
|
||||
if (Sse2.IsSupported)
|
||||
if (Sse2.IsSupported)
|
||||
{
|
||||
fixed (bool* pSource = source)
|
||||
{
|
||||
var load = Sse2.LoadVector128((byte*)pSource);
|
||||
var correct = IntrinsicUtility.CorrectBoolean(load).AsUInt64();
|
||||
@ -254,21 +259,9 @@ public static class SpanExtensions
|
||||
|
||||
return (short)(shift.GetElement(0) | (shift.GetElement(1) << 8));
|
||||
}
|
||||
if (AdvSimd.IsSupported)
|
||||
{
|
||||
// Hasn't been tested since March 6th 2023 (Reason: Unavailable hardware).
|
||||
var load = AdvSimd.LoadVector128((byte*)pSource);
|
||||
var correct = IntrinsicUtility.CorrectBoolean(load).AsUInt64();
|
||||
var multiply = IntrinsicUtility.Multiply(IntegerPackingMagicV128, correct);
|
||||
var shift = AdvSimd.ShiftRightLogical(multiply, 56);
|
||||
|
||||
return (short)(shift.GetElement(0) | (shift.GetElement(1) << 8));
|
||||
}
|
||||
else
|
||||
{
|
||||
goto default;
|
||||
}
|
||||
}
|
||||
|
||||
goto default;
|
||||
#endif
|
||||
|
||||
default:
|
||||
@ -324,9 +317,6 @@ public static class SpanExtensions
|
||||
|
||||
fixed (bool* pSource = source)
|
||||
{
|
||||
// TODO: .NET 8.0 Wasm support.
|
||||
// TODO: Implement a replacement for UInt64 vector multiplication (there are no instruction for this built-in).
|
||||
|
||||
if (Avx2.IsSupported)
|
||||
{
|
||||
var load = Avx.LoadVector256((byte*)pSource);
|
||||
|
Loading…
Reference in New Issue
Block a user